1. Field of the Invention
The invention relates in general to a method for metal bit line arrangement, and more particularly to a method for metal bit line arrangement without coupling effects.
2. Description of the Related Art
FIG. 1 (PriorArt) is a partial circuit diagram showing a memory cell block 100 of a conventional memory. Referring to FIG. 1, the memory cell block 100 includes memory cells T1 to T16, metal bit lines MBL0 to MBL7 and select transistors respectively controlled by select signals SEL0 to SEL7. In FIG. 1, the memory cells T1 to T16 are multi-bit cells, for example, and each memory cell has, without limitation to, two half cells.
Taking the memory cell T4 serving as a target memory cell as an example, when a left half cell hc6 of the memory cell T4 is to be read, the select signal SEL4 turns on the select transistor ST1 so that the drain D of the memory cell T4 is electrically connected to the metal bit line MBL0. Meanwhile, the select signal SEL3 turns on the select transistor ST2 so that the source S of the memory cell T4 is electrically connected to the metal bit line MBL3. Thereafter, a cell current Icell flowing from the drain D of the memory cell T4 to the source S of the memory cell T4 is sensed through the metal bit line MBL3 using the source side sensing technology, and the cell current Icell and a reference current Iref outputted from a reference unit (not shown) are compared with each other to judge the data stored in the left half cell hc6 of the memory cell T4.
However, when the memory cell T4 is being read, the memory cells T5 to T16 at the right side of the drain D are charged up. Because the select signal SEL3 also turns on the select transistor ST4, the metal bit line MBL7 is charged up. In addition, the select signal SEL4 also turns on the select transistor ST3 simultaneously, so the metal bit line MBL4 is charged up. Because the metal bit line MBL4 is disposed adjacent to the metal bit line MBL3, so the charging of the metal bit line MBL4 will produce the coupling effect to MBL3, and the reading window of the memory cell T4 is greatly reduced. Consequently, the cell current Icell sensed through the metal bit line MBL3 becomes incorrect and thus influences the correctness of reading the data stored in the left half cell hc6 of the memory cell T4. In order to reduce the influence caused by the coupling effect, a complicated circuit usually has to be utilized to remove the coupling effect. Consequently, the memory area is enlarged and the cost is increased.